Name
Abstract | ||
|---|---|---|
SRAM continues to be the critical technology enabler for a wide range of applications from low-power to high-performance computing. This session showcases the leading-edge SRAM developments from the semiconductor industry. Intel presents the smallest SRAM bitcell for 10nm technology, with design assist techniques to enable low VMIN operation. Samsung presents the smallest bitcell for 7nm technology and shows a double-write driver technique to further improve VMIN. TSMC demonstrates a 7nm 5GHz L1 cache for high-performance computing. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ISSCC.2018.8310250 | 2018 IEEE International Solid - State Circuits Conference - (ISSCC) |
Field | DocType | ISBN |
CPU cache,Computer science,Static random-access memory,Electrical engineering,Semiconductor industry,Embedded system | Conference | 978-1-5386-2227-8 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jonathan Yung-Cheng Chang | 1 | 166 | 25.48 |
| Chun Shiah | 2 | 1 | 1.71 |
| Leland Chang | 3 | 5 | 2.12 |