Name
Abstract | ||
|---|---|---|
With the arrival of new emerging technologies for non-volatile main memory, the cost of reading from memory will be significantly cheaper than the cost of writing to memory. This raises new challenges to algorithm design since many of the classic algorithms use approximately the same number of reads and writes. In this survey, we review the existing computational models that measure the cost of operations and memory accesses to the NVMs, and scheduler of parallel algorithms on the new hardware. The new models meanwhile allow theoretical analysis and showing lower bounds on the hardness of the classic problems. We also list some existing results on lower and upper bounds on the most common problems like sorting, searching, graph traversal, based on these models. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/IPDPSW.2018.00120 | 2018 IEEE INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS (IPDPSW 2018) |
Field | DocType | ISSN |
Algorithm design,Graph traversal,Task analysis,Parallel algorithm,Computer science,Parallel computing,Sorting,Computational model,Emerging technologies,Memory management | Conference | 2164-7062 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
1 | ||