Name
Title | ||
|---|---|---|
A Parallel Algorithm for Instruction Dependence Graph Analysis Based on Multithreading |
Abstract | ||
|---|---|---|
Microprocessor design space exploration is an inevitable stage in the early stages of microprocessor design. In work [4], a critical path analysis based design space exploration method is proposed. Critical path analysis on the instruction dependence graph is often used in the research of the micro-architecture of the instruction pipeline of the microprocessor. Previous analysis method must process the huge log file serially and the analysis time was very long. In this paper, a parallel analysis algorithm based on multithreading is presented. By partitioning the log file into multiple blocks and using multiple threads to process them in parallel, this algorithm achieved a nearly linear speedup according to the number of thread. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/BDCloud.2018.00108 | 2018 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Ubiquitous Computing & Communications, Big Data & Cloud Computing, Social Computing & Networking, Sustainable Computing & Communications (ISPA/IUCC/BDCloud/SocialCom/SustainCom) |
Keywords | Field | DocType |
Design Space Exploration, Critical Path Analysis, Parallel Processing, Dependency Graph | Multithreading,Parallel algorithm,Computer science,Parallel computing,Thread (computing),Power graph analysis,Human–computer interaction,Critical path method,Design space exploration,Dependency graph,Speedup | Conference |
ISSN | ISBN | Citations |
2158-9178 | 978-1-7281-1141-4 | 0 |
PageRank | References | Authors |
0.34 | 0 | 6 |