Name
Abstract | ||
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With the rapid development of the Internet of Things (IoT), security has attracted considerable interest. Conventional security solutions that have been proposed for the Internet based on classical cryptography cannot be applied to IoT nodes as they are typically resource-constrained. A physical unclonable function (PUF) is a hardware-based security primitive and can be used to generate a key online or uniquely identify an integrated circuit (IC) by extracting its internal random differences using so-called challenge-response pairs (CRPs). It is regarded as a promising low-cost solution for IoT security. A logic reconfigurable PUF (RPUF) is highly efficient in terms of hardware cost. This article first presents a new classification for RPUFs, namely circuit-based RPUF (C-RPUF) and algorithm-based RPUF (A-RPUF); two Exclusive OR (XOR)-based RPUF circuits (an XOR-based reconfigurable bistable ring PUF (XRBR PUF) and an XOR-based reconfigurable ring oscillator PUF (XRRO PUF)) are proposed. Both the XRBR and XRRO PUFs are implemented on Xilinx Spartan-6 field-programmable gate arrays (FPGAs). The implementation results are compared with previous PUF designs and show good uniqueness and reliability. Compared to conventional PUF designs, the most significant advantage of the proposed designs is that they are highly efficient in terms of hardware cost. Moreover, the XRRO PUF is the most efficient design when compared with previous RPUFs. Also, both the proposed XRRO and XRBR PUFs require only 12.5% of the hardware resources of previous bitstable ring PUFs and reconfigurable RO PUFs, respectively, to generate a 1-bit response. This confirms that the proposed XRBR and XRRO PUFs are very efficient designs with good uniqueness and reliability.
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Year | DOI | Venue |
|---|---|---|
2019 | 10.1145/3274666 | ACM Transactions on Embedded Computing Systems (TECS) |
Keywords | Field | DocType |
Internet of Things (IoT), XOR, low cost, reconfigurable PUF | Ring oscillator,Cryptography,Exclusive or,Computer science,Parallel computing,Field-programmable gate array,Physical unclonable function,Electronic circuit,Integrated circuit,The Internet,Embedded system | Journal |
Volume | Issue | ISSN |
18 | 3 | 1539-9087 |
Citations | PageRank | References |
2 | 0.37 | 0 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| weiqiang liu | 1 | 135 | 28.76 |
| lei zhang | 2 | 403 | 143.70 |
| Zhengran Zhang | 3 | 2 | 0.37 |
| Chongyan Gu | 4 | 46 | 9.79 |
| chenghua wang | 5 | 83 | 12.73 |
| Máire O'Neill | 6 | 36 | 6.50 |
| Fabrizio Lombardi | 7 | 57 | 10.81 |