Title
Live Demonstration: Neuromorphic Row-by-Row Multi-Convolution FPGA Processor-SpiNNaker Architecture for Dynamic-Vision Feature Extraction
Abstract
In this demonstration a spiking neural network architecture for vision recognition using an FPGA spiking convolution processor, based on leaky integrate and fire neurons (LIF) and a SpiNNaker board is presented. The network has been trained with Poker-DVS dataset in order to classify the four different card symbols. The spiking convolution processor extracts features from images in form of spikes, computes by one layer of 64 convolutions. These features are sent to an OKAERtool board that converts from AER to 2–7 protocol to be classified by a spiking neural network deployed on a SpiNNaker platform.
Year
DOI
Venue
2019
10.1109/ISCAS.2019.8702233
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
Keywords
Field
DocType
Convolution,Field programmable gate arrays,Voltage control,Retina,Feature extraction,Biological neural networks,Neuromorphics
Architecture,SpiNNaker,Voltage control,Computer science,Convolution,Field-programmable gate array,Neuromorphic engineering,Electronic engineering,Feature extraction,Spiking neural network,Computer hardware
Conference
ISSN
ISBN
Citations 
0271-4302
978-1-7281-0397-6
0
PageRank 
References 
Authors
0.34
0
6