Title
A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing
Abstract
This paper introduces the hardware implementation of one of the most popular spiking neuron models which is Izhikevich model. The main target of this implementation is to reduce area and power consumed by the Spiking Neural Network (SNN) neurons as the SNN consists of a large number of neurons to mimic the human brain. Therefore, stochastic computing techniques are used to perform the squaring term that consumes much of the power in the Izhikevich neuron model equations. A hardware implementation of the model is proposed to show the area and power consumption to help the SNN designers to choose between stochastic-based multipliers and the approximate multipliers considering their power, area, and accuracy constraints.
Year
DOI
Venue
2018
10.1109/ICM.2018.8704080
2018 30th International Conference on Microelectronics (ICM)
Keywords
Field
DocType
Stochastic processes,Computational modeling,Neurons,Mathematical model,Hardware,Microelectronics,Brain modeling
Biological neuron model,Computer science,Stochastic process,Control engineering,Spiking neural network,Computer hardware,Neuron,Stochastic computing,Power consumption
Conference
ISSN
ISBN
Citations 
2159-1679
978-1-5386-8167-1
0
PageRank 
References 
Authors
0.34
0
5
Name
Order
Citations
PageRank
Aya A. Ismail100.34
Zeinab A. Shaheen200.34
Osama Rashad300.34
Khaled N. Salama434546.11
Hassan Mostafa511651.49