Name
Abstract | ||
|---|---|---|
This paper presents a technique to mitigate faults induced by radiation in standalone embedded systems based on multi-core processors. To achieve this goal, the well known Modular Redundancy technique has been extended to take advantage of several instruction flows running on different cores. Particularly, results showing softerror mitigation using three instruction flows (threads) are presented in this work. Our technique defines a relaxed lockstep model to synchronize the execution of redundant threads on different cores. Simulated fault injection campaigns were carried out using a multi-core ARM system. The results obtained show that multi-thread versions presents similar or improved protection compared to single-threaded versions, but with reduced performance overhead. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/LATW.2019.8704614 | 2019 IEEE Latin American Test Symposium (LATS) |
Keywords | Field | DocType |
Fault tolerance,embedded systems,multi-core,standalone,bare-metal | Synchronization,Computer science,Lockstep,Thread (computing),Fault tolerance,Redundancy (engineering),Modular design,Multi-core processor,Fault injection,Embedded system | Conference |
ISBN | Citations | PageRank |
978-1-7281-1756-0 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alejandro Serrano-Cases | 1 | 3 | 2.47 |
| Felipe Restrepo-Calle | 2 | 36 | 10.96 |
| Sergio Cuenca-Asensi | 3 | 64 | 13.97 |
| Antonio Martínez-Álvarez | 4 | 118 | 16.22 |