Title | ||
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Zycube: An In-House Mini-Cluster For Agilely Developing And Conducting Computer Systems Course Projects |
Abstract | ||
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In the new era of AI and IoT, it's crucial to guide students to learn principles of computer systems design with both hardware (HW) and software (SW), or at least equip them with a HW-SW co-design concept. To overcome the lack of hardware reconfigurability in conventionally leveraged single-board computers (SBCs, e.g., Raspberry Pi) in class, this poster delivers ZyCube, a heterogeneous 4-node SoC-FPGA mini-cluster. These four nodes are orchestrated in a manner of on-demand network service to support a dozen of students to agilely and simultaneously conduct computer systems projects. Three capacity-building course projects are shown with ZyCube, which are (1) HW design of a simplified CPU core with performance profiling using C-language microbenchmarks, (2) rapid co-design of a deep neural network inference accelerator with the CPU core, and (3) datapath optimization with a co-designed DMA engine. These projects are believed to help students to obtain a comprehensive perspective of HW-SW coordination and teachers to leverage a similar platform and pedagogy in their courses. |
Year | DOI | Venue |
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2019 | 10.1145/3300115.3312515 | PROCEEDINGS OF THE ACM CONFERENCE ON GLOBAL COMPUTING EDUCATION (COMPED '19) |
Keywords | Field | DocType |
FPGA cluster, Computer system, HW-SW co-design | Network service,Datapath,Central processing unit,Reconfigurability,Software engineering,Profiling (computer programming),Computer science,Systems design,Software,Multi-core processor | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ke Zhang | 1 | 75 | 21.74 |
Yisong Chang | 2 | 5 | 3.92 |
Ming-yu Chen | 3 | 902 | 79.29 |
Yungang Bao | 4 | 361 | 31.11 |
Zhiwei Xu | 5 | 38 | 5.61 |