Name
Abstract | ||
|---|---|---|
As technology scaling is reaching its limits, new approaches have been proposed for computional efficiency. Approximate computing is a promising technique for high performance and low power circuits as used in error-tolerant applications. Among approximate circuits, approximate arithmetic designs have attracted significant research interest. In this paper, the design of approximate redundant binar... |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/TC.2018.2890222 | IEEE Transactions on Computers |
Keywords | Field | DocType |
Compressors,Adders,Approximate computing,Power demand,Error analysis,Hardware,Delays | Adder,Computer science,Parallel computing,Algorithm,Multiplier (economics),Power circuits,Encoder,Electronic circuit,Word (computer architecture),Binary number,Approximate computing | Journal |
Volume | Issue | ISSN |
68 | 6 | 0018-9340 |
Citations | PageRank | References |
4 | 0.45 | 0 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| weiqiang liu | 1 | 135 | 28.76 |
| Tian Cao | 2 | 5 | 0.80 |
| Peipei Yin | 3 | 10 | 2.70 |
| Yuying Zhu | 4 | 4 | 0.45 |
| chenghua wang | 5 | 83 | 12.73 |
| Earl E. Swartzlander, Jr. | 6 | 946 | 181.88 |
| Fabrizio Lombardi | 7 | 57 | 10.81 |