Name
Title | ||
|---|---|---|
On-Chip Implementation of Analog Linearization Schemes for Giant-Magnetoresistance Sensors |
Abstract | ||
|---|---|---|
In this paper, on-chip implementation of two linearization schemes for the giant-magnetoresistance (GMR) sensors has been presented. Conventionally, these linearization schemes are implemented in the discrete levels requiring dual supply rails (positive as well as negative), high power consumption, large component-counts and board space. In the proposed work, on-chip solutions are presented using a single supply voltage. Various design techniques are incorporated to enable a low-voltage, low-power operation and enhance the sensitivity of the sensor. The proposed schemes are designed in a 180-nm CMOS process. Preliminary simulation results in the architectural level show the efficacy of the proposed schemes. Integrated simulation results with the previously measured characteristic data of the GMR sensor show a good agreement with the theory as well as their discrete-counterparts. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ICSensT.2018.8603569 | 2018 12th International Conference on Sensing Technology (ICST) |
Keywords | DocType | ISSN |
Giant magnetoresistance,non-linearity,linearization scheme,instrumentation amplifier,charge-pump | Conference | 2156-8065 |
ISBN | Citations | PageRank |
978-1-5386-5148-3 | 0 | 0.34 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tapabrata Sen | 1 | 0 | 0.68 |
| Ashis Maity | 2 | 17 | 4.46 |
| Siddhartha Sen 0002 | 3 | 75 | 14.07 |