Title | ||
---|---|---|
Design of FSM-Based Function With Reduced Number of States in Integral Stochastic Computing |
Abstract | ||
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Stochastic computing (SC) is a promising computing paradigm with low power hardware circuitry. This brief proposes a new finite state machine (FSM)-based function implementation in the SC designs. The new architecture allows multiple input stochastic bitstreams to improve the processing latency and precision loss. As compared to previous integral SC design, the proposed algorithm reduces the total... |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/TVLSI.2019.2892847 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Hardware,Neural networks,Very large scale integration,Computer architecture,Mathematical analysis,Power demand,Indexes | Computer science,Latency (engineering),Activation function,Implementation,Electronic engineering,Finite-state machine,Computer engineering,Stochastic computing,Deep neural networks,Power consumption | Journal |
Volume | Issue | ISSN |
27 | 6 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Shao-I Chu | 1 | 38 | 9.36 |
Chen-En Hsieh | 2 | 0 | 0.68 |
Yu-Jung Huang | 3 | 73 | 9.20 |