Abstract | ||
---|---|---|
Power has become a fundamental limit to silicon performance. Most research has focused on reducing transistor switching to constrain power (dark silicon.) Specialized accelerators have been proposed since they implement functionality with fewer transistor switches than general purpose cores. Increasing efficiency requirements lead to more specialization and, therefore, more accelerators that poten... |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/LCA.2019.2909867 | IEEE Computer Architecture Letters |
Keywords | Field | DocType |
Throughput,Silicon,Layout,Benchmark testing,Wires,Transistors,Field programmable gate arrays | Dark silicon,General purpose,Computer science,Parallel computing,Field-programmable gate array,Application-specific integrated circuit,Hardware acceleration,Transistor,Electrical engineering,Silicon,Computation | Journal |
Volume | Issue | ISSN |
18 | 1 | 1556-6056 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tian Tan | 1 | 3 | 2.11 |
Eriko Nurvitadhi | 2 | 399 | 33.08 |
Derek Chiou | 3 | 718 | 48.97 |