Abstract | ||
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The recent emergence of novel computational devices, such as adiabatic quantum computers, CMOS annealers, and optical parametric oscillators, present new opportunities for hybrid-optimization algorithms that are hardware accelerated by these devices. In this work, we propose the idea of an Ising processing unit as a computational abstraction for reasoning about these emerging devices. The challenges involved in using and benchmarking these devices are presented and commercial mixed integer programming solvers are proposed as a valuable tool for the validation of these disparate hardware platforms. The proposed validation methodology is demonstrated on a D-Wave 2X adiabatic quantum computer, one example of an Ising processing unit. The computational results demonstrate that the D-Wave hardware consistently produces high-quality solutions and suggests that as IPU technology matures it could become a valuable co-processor in hybrid-optimization algorithms. |
Year | DOI | Venue |
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2019 | 10.1007/978-3-030-19212-9_11 | integration of ai and or techniques in constraint programming |
Field | DocType | Citations |
Adiabatic process,Mathematical optimization,Adiabatic quantum computation,Quadratic unconstrained binary optimization,Discrete optimization,Computer science,Quantum computer,Ising model,Integer programming,Parametric statistics,Computer engineering | Conference | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Carleton Coffrin | 1 | 204 | 20.20 |
H. Nagarajan | 2 | 48 | 9.37 |
Russell Bent | 3 | 79 | 15.68 |