Title
An FPGA Based Hardware Accelerator for Classification of Handwritten Digits
Year
DOI
Venue
2018
10.1007/978-3-030-16657-1_88
intelligent systems design and applications
Field
DocType
Citations 
Pipeline (computing),Computer architecture,Massively parallel,Computer science,Convolutional neural network,Interfacing,Field-programmable gate array,Software,Artificial intelligence,Hardware acceleration,Machine learning,Speedup
Conference
0
PageRank 
References 
Authors
0.34
0
4
Name
Order
Citations
PageRank
R. Gautham Sundar Ram100.34
Nitin Chaturvedi223.06
Sumeet Saurav300.34
Singh, S.4176.95