Title
Hardware and Software Architecture for Accelerating Hash Functions Based on SoC
Abstract
This paper presents an architecture for fast prototyping of hardware designs aiming to accelerate cryptographic hash functions on Xilinx ZYNQ SoC. The design include both hardware and software components, using DMA and custom AXI4-Stream IPs for maximum performance and easy integration. The communication link between the hardware module that accelerates hash functions and the processor running Linux is accessible directly from the user-space, providing fast debugging/benchmarking capabilities. As a proof-of-concept, a custom, pipelined and optimized bitcoin miner module was developed in order to demonstrate the feasibility of this infrastructure, and to evaluate its performance. The proposed solution was implemented on an Arty Z7-20 development board.
Year
DOI
Venue
2019
10.1109/CSCS.2019.00031
2019 22nd International Conference on Control Systems and Computer Science (CSCS)
Keywords
Field
DocType
cryptography, Hash functions, FPGA, Zynq SoC, AXI4-Stream, DMA
Computer science,Cryptography,Cryptographic hash function,Field-programmable gate array,Hash function,Component-based software engineering,Software architecture,Computer hardware,Benchmarking,Debugging
Conference
ISSN
ISBN
Citations 
2379-0474
978-1-7281-2332-5
0
PageRank 
References 
Authors
0.34
3
3
Name
Order
Citations
PageRank
Ovidiu Panait100.34
Luminita Dumitriu213.39
Ioan Susnea312.72