Abstract | ||
---|---|---|
The Advanced Encryption Standard (AES) algorithm is the best choice for security services in many applications, such as WLAN systems. This paper presents an AES hardware using composite-field by decomposing the complex Galois-field GF(2
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup>
) to the lower order field. Conventional designs are based on the Lookup table Sbox (LUT-Sbox)[1] to implement the S-box and InvS-box that cost much memory and area. Our proposed design using combinational logic is based on composite-field in finite fields GF(2
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup>
). The area cost is reduced because most of the functionalities are shared for both S-box and InvS-box, they are implemented on the same hardware. The proposed implementation occupies 4.1 kGEs and the maximum frequency is 180 MHz. Our implementation uses Verilog HDL on Virtex7 FPGA board. |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/RIVF.2019.8713711 | 2019 IEEE-RIVF International Conference on Computing and Communication Technologies (RIVF) |
Keywords | Field | DocType |
Advanced Encryption Standard (AES),Composite-field,S-box,multiplicative inversion,WLAN | S-box,Computer science,Composite field,Computer hardware | Conference |
ISSN | ISBN | Citations |
2162-786X | 978-1-5386-9314-8 | 0 |
PageRank | References | Authors |
0.34 | 5 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Do Quang Huy | 1 | 0 | 0.34 |
Duc Minh Nguyen | 2 | 43 | 10.96 |
Lam Duc Khai | 3 | 0 | 0.34 |
Vu Duc Lung | 4 | 0 | 0.34 |