Title
Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis
Abstract
Hierarchical reversible logic synthesis can find quantum circuits for large combinational functions. The price for a better scalability compared to functional synthesis approaches is the requirement for many additional qubits to store temporary results of the hierarchical input representation. However, implementing a quantum circuit with large number of qubits is a major hurdle. In this paper, we demonstrate and establish how reversible pebble games can be used to reduce the number of stored temporary results, thereby reducing the qubit count. Our proposed algorithm can be constrained with number of qubits, which is aimed to meet. Experimental studies show that the qubit count can be significantly reduced (by up to 63.2%) compared to the state-of-the-art algorithms, at the cost of additional gate count.
Year
DOI
Venue
2019
10.1109/ISMVL.2019.00026
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)
Keywords
Field
DocType
Reversible Pebble Game,Quantum Logic Synthesis,Quantum Computing,Qubit,Logic Synthesis
Quantum circuit,Logic synthesis,Quantum,Gate count,Computer science,Parallel computing,Quantum computer,Electronic engineering,Electronic circuit,Qubit,Scalability
Conference
ISSN
ISBN
Citations 
0195-623X
978-1-7281-0093-7
0
PageRank 
References 
Authors
0.34
11
5
Name
Order
Citations
PageRank
Debjyoti Bhattacharjee1269.84
Mathias Soeken257464.65
Srijit Dutta310.72
Anupam Chattopadhyay464.23
Giovanni De Micheli5102451018.13