Title
Demonstration of ternary devices and circuits using dual channel graphene barristors
Abstract
Graphene barristors with two parallel connected n-type and undoped graphene channels are used to build a ternary logic switch. Three distinctly separated out current levels are successfully demonstrated and the experimental device parameters obtained from the graphene barristor based ternary switch are used to model the ternary circuit modules. Well-behaving standard ternary inverter, NMIN, NMAX, and ternary comparator have been obtained, confirming the feasibility of large scale integration of ternary logic devices.
Year
DOI
Venue
2019
10.1109/ISMVL.2019.00013
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)
Keywords
Field
DocType
Ternary logic device,Graphene doping,Controllable Schottky barrier height,Multi-valued logic
Inverter,Comparator,Graphene,Computer science,Communication channel,Ternary operation,Electronic engineering,Electronic circuit
Conference
ISSN
ISBN
Citations 
0195-623X
978-1-7281-0093-7
0
PageRank 
References 
Authors
0.34
2
10
Name
Order
Citations
PageRank
So-Young Kim100.34
Sunwoo Heo200.68
Kiyung Kim300.34
Myungwoo Son400.34
Seung-Mo Kim500.34
Ho-In Lee600.34
Yongsu Lee7398.50
Hyeon Jun Hwang800.34
Moon-Ho900.34
Byoung Hun Lee10324.71