Abstract | ||
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The three-moduli set {2n,2n − 1,2n+ 1 − 1} started to receive more attention lately. This moduli set is considered an arithmetic-friendly set because it avoids the demanding channel (2n + 1) of the traditional 3-moduli set {2n,2n − 1,2n + 1}. This work considers an enhanced form of the above moduli set, {2n + k,2n − 1,2n+ 1 − 1}, and proposes a sign identifier for numbers within the dynamic range of the set. While the published sign identifiers have dealt with the unextended form {2n,2n − 1,2n+ 1 − 1}, this is the first sign identifier that deals with the extended form. Based on VLSI layout synthesis for the case (k = 0), the proposed structure has less or similar area and power requirements, nevertheless, it achieves an improved time performance in the range of (13.0–29.6)% compared with the most recent sign identifiers. When compared with a recently published residue-to-binary converter for the moduli set {2n + k,2n − 1,2n− 1 − 1}, which can function as a converter-based sign identifier, the proposed detector has on average reduced area, time, and power by 175%, 106%, and 60%, respectively. |
Year | DOI | Venue |
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2019 | 10.1007/s11265-018-1434-z | Journal of Signal Processing Systems |
Keywords | DocType | Volume |
Residue number system, Computer arithmetic, Digital circuits, VLSI design | Journal | 91 |
Issue | ISSN | Citations |
8 | 1939-8018 | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
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Ahmad Hiasat | 1 | 1 | 0.69 |
Leonel Sousa | 2 | 1210 | 145.50 |