Title
A Multilayer-Learning Current-Mode Neuromorphic System with Analog-Error Compensation.
Abstract
Internet-of-things (IoT) applications that use machine-learning algorithms have increased the demand for application-specific energy-efficient hardware that can perform both learning and inference tasks to adapt to endpoint users or environmental changes. This paper presents a multilayer-learning neuromorphic system with analog-based multiplier-accumulator (MAC), which can learn training data by stochastic gradient descent algorithm. As a component of the proposed system, a current-mode MAC processor, fabricated in 28-nm CMOS technology, performs both forward and backward processing in a crossbar structure of 500 × 500 6-bit transposable SRAM arrays. The proposed system is verified in a two-layer neural network by using two prototype chips and an FPGA. Without any calibration circuit for the analog-based MAC, the proposed system compensates for non-idealities from analog operations by learning training data with the analog-based MAC. With 1-bit (+1, 0, -1) batch update of 6-bit synaptic weights, the proposed system achieves a recognition rate of 96.6 % with a peak energy efficiency of 2.99 TOPS/W (1 OP = one unsigned 8-bit × signed 6-bit MAC operation) in the classification of the MNIST dataset.
Year
DOI
Venue
2019
10.1109/TBCAS.2019.2929696
IEEE transactions on biomedical circuits and systems
Keywords
Field
DocType
Hardware,Neuromorphics,Pulse width modulation,Neural networks,Energy efficiency,Artificial intelligence,Synapses
Stochastic gradient descent,MNIST database,Computer science,Field-programmable gate array,Neuromorphic engineering,Static random-access memory,Electronic engineering,CMOS,Artificial neural network,Computer hardware,Crossbar switch
Journal
Volume
Issue
ISSN
13
5
1932-4545
Citations 
PageRank 
References 
0
0.34
0
Authors
7
Name
Order
Citations
PageRank
Hyunwoo Son1114.43
Hwasuk Cho223.12
Jungho Lee3224.55
Seongun Bae400.34
Byungsub Kim516537.71
Hong-june Park646572.93
Jae-yoon Sim750883.58