Title
A 1.54mW/Element 150μm-Pitch-Matched Receiver ASIC with Element-Level SAR/Shared-Single-Slope Hybrid ADCs for Miniature 3D Ultrasound Probes
Abstract
This paper presents an ultrasound receiver ASIC in 180nm CMOS that enables element-level digitization of echo signals in miniature 3D ultrasound probes. It is the first to integrate an analog front-end and a 10-b Nyquist ADC within the 150 μm element pitch of a 5-MHz 2D transducer array. To achieve this, a hybrid SAR/shared-single-slope architecture is proposed in which the ramp generator is shared within each 2x2 subarray. The ASIC consumes 1.54mW/element and has been successfully demonstrated in an acoustic imaging experiment.
Year
DOI
Venue
2019
10.23919/VLSIC.2019.8778200
2019 Symposium on VLSI Circuits
Keywords
Field
DocType
ultrasound,ASIC,ADC,receiver
Flight dynamics (spacecraft),Transducer,Computer science,Field-programmable gate array,Electronic engineering,Application-specific integrated circuit,CMOS,Bandwidth (signal processing),Ramp generator,Acoustics,3D ultrasound
Conference
ISSN
ISBN
Citations 
2158-5601
978-1-7281-0914-5
0
PageRank 
References 
Authors
0.34
0
10
Name
Order
Citations
PageRank
Jing Li100.34
Zhao Chen27625.75
Mingliang Tan362.53
Douwe van Willigen400.34
Chao Chen52032185.26
Zu-yao Chang6228.75
Emile Noothout7144.30
Nico de Jong851.16
Martin Verweij900.34
Michiel Pertijs1011.03