Name
Abstract | ||
|---|---|---|
Ubiquitous asymmetric multi-core processors such as ARM big.LITTLE combine together cores with different power-performance characteristics on a single chip. Upcoming asymmetric many-core processors are expected to combine hundreds of cores belonging to different types. However, the accompanying task-to-core mapping schedules are the key to achieving the full potential of such processors. Run-time scheduling on asymmetric processors is a much harder problem to solve optimally than scheduling on symmetric processors with equivalent cores. We present the first-ever greedy scheduler to be proven theoretically optimal (under certain constraints) for asymmetric processors. The proposed scheduler, called A-Greedy, improves throughput by 26% and reduces average response time by up to 45% when compared to the default Linux scheduler on ARM big.LITTLE asymmetric multi-core. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1007/978-3-030-27562-4_9 | EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, SAMOS 2019 |
Keywords | Field | DocType |
Multi-/many-cores, Asymmetric processors, Scheduling, Optimal greedy, ARM big.LITTLE | Computer science,Scheduling (computing),Parallel computing,Response time,Chip,Schedule,Throughput,Scalability | Conference |
Volume | ISSN | Citations |
11733 | 0302-9743 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vanchinathan Venkataramani | 1 | 76 | 5.85 |
| Anuj Pathania | 2 | 181 | 14.97 |
| Tulika Mitra | 3 | 2714 | 135.99 |