Name
Abstract | ||
|---|---|---|
Emerging Multicore SoC SmartNICs, enclosing rich computing resources (e.g., a multicore processor, onboard DRAM, accelerators, programmable DMA engines), hold the potential to offload generic datacenter server tasks. However, it is unclear how to use a SmartNIC efficiently and maximize the offloading benefits, especially for distributed applications. Towards this end, we characterize four commodity SmartNICs and summarize the offloading performance implications from four perspectives: traffic control, computing capability, onboard memory, and host communication.
Based on our characterization, we build iPipe, an actor-based framework for offloading distributed applications onto SmartNICs. At the core of iPipe is a hybrid scheduler, combining FCFS and DRR-based processor sharing, which can tolerate tasks with variable execution costs and maximize NIC compute utilization. Using iPipe, we build a real-time data analytics engine, a distributed transaction system, and a replicated key-value store, and evaluate them on commodity SmartNICs. Our evaluations show that when processing 10/25Gbps of application bandwidth, NIC-side offloading can save up to 3.1/2.2 beefy Intel cores and lower application latencies by 23.0/28.0 μs.
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Year | DOI | Venue |
|---|---|---|
2019 | 10.1145/3341302.3342079 | SIGCOMM |
Keywords | Field | DocType |
SmartNIC, distributed applications | Dram,Data analysis,Computer science,Processor sharing,Bandwidth (signal processing),Distributed transaction,Multi-core processor,Distributed computing | Conference |
ISBN | Citations | PageRank |
978-1-4503-5956-6 | 10 | 0.52 |
References | Authors | |
0 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ming Liu | 1 | 276 | 50.00 |
| Tianyi Cui | 2 | 10 | 1.20 |
| Henry Schuh | 3 | 10 | 0.52 |
| Arvind Krishnamurthy | 4 | 4540 | 312.24 |
| Simon Peter | 5 | 607 | 29.65 |
| Karan Gupta | 6 | 25 | 3.76 |