Paper Info
Title
On Integrating Lightweight Encryption in Reconfigurable Scan Networks
Abstract
Reconfigurable Scan Networks (RSNs) are a powerful tool for testing and maintenance of embedded systems, since they allow for flexible access to on-chip instrumentation such as built-in self-test and debug modules. RSNs, however, can be also exploited by malicious users as a side-channel in order to gain information about sensitive data or intellectual property and to recover secret keys. Hence, implementing appropriate counter-measures to secure the access to and data integrity of embedded instrumentation is of high importance. In this paper we present a novel hardware and software combined approach to ensure data privacy in IEEE Std 1687 (IJTAG) RSNs. To do so, both a secure IJTAG compliant plug-and-play instrument wrapper and a versatile software toolchain are introduced. The wrapper demonstrates the necessary architectural adaptations required when using a lightweight stream cipher, whereas the software toolchain provides a seamless integration of the testing workflow with stream cipher. The applicability of the method is demonstrated by an FPGA-based implementation. We report on the performance of the developed instrument wrapper, which is empirically shown to have only a small impact on the workflow in terms of hardware overhead, operational costs and test time overhead.
Year
DOI
Venue
2019
10.1109/ETS.2019.8791543
2019 IEEE European Test Symposium (ETS)
Keywords
Field
DocType
IJTAG,IEEE Std 1687,Hardware Security,Encryption,RSN,PUF,Secure Wrapper
Hardware security module,Computer science,Real-time computing,Encryption,Stream cipher,Data integrity,Software,Embedded instrumentation,Toolchain,Debugging,Embedded system
Conference
ISSN
ISBN
Citations 
1530-1877
978-1-7281-1174-2
1
PageRank 
References 
Authors
0.36
11
5
Name
Order
Citations
PageRank
Benjamin Thiemann110.70
Linus Feiten210.36
Pascal Raiola332.77
B. Becker419121.44
Matthias Sauer519520.02