Title
RAPID: A ReRAM Processing in-Memory Architecture for DNA Sequence Alignment
Abstract
Sequence alignment is a core component of many biological applications. As the advancement in sequencing technologies produces a tremendous amount of data on an hourly basis, this alignment is becoming the critical bottleneck in bioinformatics analysis. Even though large clusters and highly-parallel processing nodes can carry out sequence alignment, in addition to the exacerbated power consumption, they cannot afford to concurrently process the massive amount of data generated by sequencing machines. In this paper, we propose a novel processing in-memory (PIM) architecture suited for DNA sequence alignment, called RAPID. We revise the state-of-the-art alignment algorithm to make it compatible with in-memory parallel computations, and process DNA data completely inside memory without requiring additional processing units. The main advantage of RAPID over the other alignment accelerators is a dramatic reduction in internal data movement while maintaining a remarkable degree of parallelism provided by PIM. The proposed architecture is also highly scalable, facilitating precise alignment of lengthy sequences. We evaluated the efficiency of the proposed architecture by aligning chromosome sequences from human and chimpanzee genomes. The results show that RAPID is at least 2× faster and 7× more power efficient than BioSEAL, the best DNA sequence alignment accelerator.
Year
DOI
Venue
2019
10.1109/ISLPED.2019.8824830
2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
Keywords
Field
DocType
ReRAM processing in-memory architecture,sequencing technologies,sequencing machines,in-memory parallel computations,process DNA data,DNA sequence alignment accelerator,RAPID,data movement,chromosome sequences,bioinformatics,parallel processing nodes,chimpanzee genomes,human genomes,parallelism
Sequence alignment,Bottleneck,Degree of parallelism,Computer science,Parallel computing,Real-time computing,Memory architecture,Scalability,Computation,Resistive random-access memory,Power consumption
Conference
ISBN
Citations 
PageRank 
978-1-7281-2955-6
6
0.42
References 
Authors
17
5
Name
Order
Citations
PageRank
Saransh Gupta110111.58
Mohsen Imani234148.13
Behnam Khaleghi39113.49
Venkatesh Kumar460.42
Tajana Simunic53198266.23