Name
Abstract | ||
|---|---|---|
Hyper-dimensional Computing (HDC), a bio-inspired paradigm defined on random high-dimensional vectors, has emerged as a promising IoT paradigm. It is known to provide competitive accuracy on sequential prediction tasks with much smaller model size and training time compared to conventional ML, and is well-suited for human-centric IoT. In the post-Moore scaling era, where increasing variability has challenged traditional designers, its novel computing method based on randomness can be leveraged for continued performance. This work develops a complete, programmable architecture for ultra energy-efficient supervised classification using HD computing. Its simple construction follows from basic HD operations and its massively parallel, shallow datapath (< 10 logic layers) resembles in-memory computing. The architecture also supports scalability: multiple such processors can be connected pralallely to increase effective HD dimension. A broad evaluation is performed by comparing HDC and 3 conventional ML algorithms on conventional architectures such as CPU and eGPU for instruction count, energy cost and memory requirements. Finally, a 2048-dim ASIC design is synthesized in a 28nm HK/MG process and benchmarked on 9 supervised classification tasks with varying complexity (such as language recognition and human face detection). The simulated chip exhibits energy efficiency
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/pred. for the entire benchmark at about 2.5ns cycle time, with most applications requiring < 700 nJ/pred. As a first complete design working with high dimensional stochastic signals, the main architectural decisions for similar systems harnessing variability in emerging devices (eg. CNFET and RRAM) are established. A fabricated system could be readily deployed for human-centric IoT applications. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/JETCAS.2019.2935464 | IEEE Journal on Emerging and Selected Topics in Circuits and Systems |
Keywords | Field | DocType |
Brain-inspired computing,hyper-dimensional computing,holographic reduced representations,energy efficiency,Internet-of-Things,human-centric computing,body sensing (alternatively body sensor networks) | Architecture,Datapath,Computer architecture,Task analysis,Massively parallel,Computer science,Internet of Things,Real-time computing,Benchmark (computing),Microarchitecture,Randomness | Journal |
Volume | Issue | ISSN |
9 | 3 | 2156-3357 |
Citations | PageRank | References |
7 | 0.49 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sohum Datta | 1 | 23 | 2.09 |
| Ryan A. G. Antonio | 2 | 7 | 0.49 |
| Aldrin R. S. Ison | 3 | 7 | 0.49 |
| Jan M. Rabaey | 4 | 4796 | 1049.96 |