Name
Title | ||
|---|---|---|
Integration of SMT-based Scheduling with RC Network Calculus Analysis in TTEthernet Networks |
Abstract | ||
|---|---|---|
In mixed-criticality Ethernet-based time-triggered networks, like TTEthernet, time-triggered communication (TT) coexists with rate-constrained (RC) and best-effort (BE) traffic. A global communication scheme, i.e., a schedule, establishes contention-free transmission times for TT flows ensuring guaranteed low latency and minimal jitter. Current approaches use Satisfiability Modulo Theories (SMT) to formulate the scheduling constraints and solve the resulting problem. However, these approaches do not take into consideration the impact of the TT schedule on RC traffic. Hence, the resulting TT schedule may cause the worst-case latency requirements of RC traffic not to be fulfilled anymore.In this paper, we present a novel method for including an RC analysis in state-of-the-art SMT-based schedule synthesis algorithms via a feedback loop in order to maintain the optimality properties of the SMT-based approaches while also being able to improve the RC traffic delays. Our method is designed in such a way that it can be readily integrated into existing SMT- or MiP-based solutions. We evaluate our approach using variants derived from a realistic use-case and present methods to further improve the efficiency of our feedback-based approach. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/ETFA.2019.8869365 | 2019 24th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA) |
Keywords | Field | DocType |
RC traffic delays,MiP-based solutions,feedback-based approach,SMT-based scheduling,RC network calculus analysis,TTEthernet networks,mixed-criticality Ethernet-based time-triggered networks,time-triggered communication,best-effort traffic,global communication scheme,contention-free transmission times,minimal jitter,satisfiability modulo theories,scheduling constraints,state-of-the-art SMT-based schedule synthesis algorithms,TT schedule,rate-constrained traffic,worst-case latency requirements,feedback loop,optimality properties | Job shop scheduling,Scheduling (computing),Real-time computing,RC circuit,Schedule,TTEthernet,Jitter,Engineering,Latency (engineering),Distributed computing,Satisfiability modulo theories | Conference |
ISSN | ISBN | Citations |
1946-0740 | 978-1-7281-0304-4 | 1 |
PageRank | References | Authors |
0.35 | 0 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anaïs Finzi | 1 | 2 | 0.70 |
| Silviu S. Craciunas | 2 | 131 | 11.80 |