Title
Instruction Vulnerability Test and Code Optimization Against DVFS Attack
Abstract
With the growing cost of powering and cooling, the Dynamic Voltage Frequency Scaling (DVFS) technique has been adopted in many mobiles and embedded devices nowadays. However, attackers are capable of maliciously manipulating the DVFS to threaten application programs including the security related ones. This paper first proposes a test method to test the vulnerabilities of CPU instructions under the DVFS attack. The test program feature, the testability of CPU instructions, and the Test Program Generation Algorithm (TPGA) are proposed. It is applied to an arm CPU in a mobile phone. Typical instructions are tested, and some are found vulnerable. Then, based on the test result, a method for code optimization by instruction substitution is proposed. The application program using vulnerable instructions are then attacked and optimized to prove the effectiveness of the proposed methods.
Year
DOI
Venue
2019
10.1109/ITC-Asia.2019.00022
2019 IEEE International Test Conference in Asia (ITC-Asia)
Keywords
Field
DocType
instruction vulnerability,DVFS attack,processor
Program optimization,Testability,Dynamic voltage frequency scaling,ARM architecture,Test method,Computer science,Real-time computing,Mobile phone,Test program,Embedded system,Vulnerability
Conference
ISBN
Citations 
PageRank 
978-1-7281-4719-2
0
0.34
References 
Authors
9
8
Name
Order
Citations
PageRank
Junying Huang102.03
Jing Ye24512.80
Xiaochun Ye312528.41
Da Wang401.35
FAN Dong-Rui522238.18
Huawei Li641756.32
Xinrong Li71266157.76
Zhimin Zhang85411.10