Title
Performance and Energy Efficiency Trade-Offs in Single-ISA Heterogeneous Multi-Processing for Parallel Applications
Abstract
This work proposes a novel methodology to predict the optimal performance and energy efficiency trade-off configurations of parallel applications running on a two-cluster Heterogeneous Multi-Processing (HMP) system. we propose an analytic performance and power model that are generated offline using data measurements. These models are then used to estimate the whole configuration space to predict the application's performance and energy consumption. Then, we use these off-line predictions to choose Pareto-optimal configurations, which is the most efficient among all configurations for the given architecture and multi-threaded application. We validated our methodology on an ODROID XU3 board on several PARSEC and Phoronix Test Suite applications.
Year
DOI
Venue
2019
10.1109/VLSI-SoC.2019.8920384
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)
Keywords
Field
DocType
Pareto Frontier,Energy modeling,Performance modeling,Heterogeneous Multi-Processing,Energy and Performance trade-offs
Test suite,Architecture,Parsec,Supercomputer,Efficient energy use,Computer science,Multiprocessing,Energy consumption,Configuration space,Distributed computing
Conference
ISSN
ISBN
Citations 
2324-8432
978-1-7281-3916-6
0
PageRank 
References 
Authors
0.34
5
5