Paper Info
Title
GC-eDRAM With Body-Bias Compensated Readout and Error Detection in 28-nm FD-SOI.
Abstract
Gain-cell embedded DRAM (GC-eDRAM) is an attractive alternative to conventional SRAM due to its high-density, low-leakage, and inherent two-ported functionality. However, its dynamic storage mechanism requires power-hungry refresh cycles to maintain data. This problem is aggravated due to the impact of process-voltage-temperature (PVT) variations at deeply scaled technology nodes and low voltages....
Year
DOI
Venue
2019
10.1109/TCSII.2019.2896164
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
DocType
Volume
Inverters,Discharges (electric),Random access memory,Switches,Clocks,Circuits and systems,Timing
Journal
66
Issue
ISSN
Citations 
12
1549-7747
0
PageRank 
References 
Authors
0.34
0
4
Name
Order
Citations
PageRank
Robert Giterman1409.55
Andrea Bonetti2145.89
A. Burg31426126.54
Adam Teman412919.12