Title
A 1 V, 0.53 ns, 59 μW Current Comparator Using Standard 0.18 μm CMOS Technology
Abstract
This letter aim to propose a current comparator based on simple current mirror which use single amplifier to reduce input offset, the improving symmetry current comparator achieve lower propagation delay (0.53 ns at input current $$I = 10\,{\upmu }$$A) and lower power dissipation (59 $${\upmu }$$W at SS corner) by comparing proposed structure at the supply voltage of 1 V, circuit simulations are performed in cadence software and hspice for a 0.18 $${\upmu }$$m TSMC standard CMOS process.
Year
DOI
Venue
2020
10.1007/s11277-019-06888-9
Wireless Personal Communications
Keywords
DocType
Volume
Current comparator, Current mirror, Amplifier, Propagation delay
Journal
111
Issue
ISSN
Citations 
2
0929-6212
0
PageRank 
References 
Authors
0.34
0
6
Name
Order
Citations
PageRank
Fei Yu1277.41
Lei Gao200.34
Li Liu316950.09
Shuai Qian400.34
Shuo Cai5215.90
Yun Song641.10