Paper Info
Title
Passive SC $\Delta\Sigma$ Modulator Based on Pipelined Charge-Sharing Rotation in 28-nm CMOS
Abstract
In this paper, we introduce a new switched-capacitor (SC) passive delta-sigma ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> ) modulator architecture. It is based on a charge-sharing rotation technique, which eliminates any inter-stage loading effects that plague the conventional SC passive <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> modulators. To improve the proposed modulator’s noise suppression and stability, an independent extra feedback path and a zeroing stage are added to the 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> -stage integrator. Moreover, a pipelining (i.e. interleaving) technique is employed in the passive low-pass filter to relax settling requirements and improve power efficiency. Compared to the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> modulators with active integrators, the proposed modulator contains only switches, capacitors and one comparator, thus being greatly amenable to nanoscale CMOS process nodes. Implemented in 28-nm CMOS, the proposed ADC occupies a core area of 0.059 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . It achieves measured SNDR of 81.1 dB and a measured dynamic range (DR) of 83.6 dB with a signal bandwidth of 80 kHz at 40.96 MS/s, while consuming 101.5 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> . SNDR is maintained above 70 dB across a ±20% supply variation.
Year
DOI
Venue
2020
10.1109/TCSI.2019.2944467
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
DocType
Volume
Modulation,Capacitors,Loading,Gain,Quantization (signal),Topology,Attenuation
Journal
67
Issue
ISSN
Citations 
2
1549-8328
1
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Hongying Wang181.82
Filippo Schembari2112.52
Robert Bogdan Staszewski353693.76