Name
Abstract | ||
|---|---|---|
This paper compares the performance achievable in different scaled technologies by analog circuits, using a strong-arm latch as an example. The performance analysis has been carried out in a 7-nm and a 16-nm FinFET technologies, and in a 28-nm FDSOI technology, considering different input signal amplitudes, input common-mode voltage levels, process corners, and temperatures. The circuit used for the comparison has been optimized for the 7-nm technology with a supply voltage of 0.9 V and a clock frequency of 1 GHz and scaled, maintaining the same transistor aspect ratio in the other technologies. In typical cases, the 7-nm technology is slower than the 16-nm technology, but it has better performance in terms of power-delay product (PDP). The 16-nm technology features lower delay when the input common-mode voltage is higher than 750 mV, but with larger PDP. The 28-nm technology in all the cases is the slowest in speed and achieves the worst PDP. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/ICECS46596.2019.8964769 | 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) |
Keywords | Field | DocType |
Scaled technology,strong-arm latch,common-mode voltage,temperature,offset | Analogue electronics,Computer science,Process corners,Voltage,Electronic engineering,Common-mode signal,Transistor,Amplitude,Offset (computer science),Clock rate | Conference |
ISBN | Citations | PageRank |
978-1-7281-0997-8 | 0 | 0.34 |
References | Authors | |
0 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhaochen Yin | 1 | 0 | 0.34 |
| Walter Audoglio | 2 | 0 | 0.34 |
| Marco Grassi | 3 | 0 | 0.34 |
| Piero Malcovati | 4 | 186 | 50.22 |
| Edoardo Bonizzoni | 5 | 162 | 47.30 |