Paper Info
Title
A 7.6-nW 1-kS/s 10-bit SAR ADC for Biomedical Applications
Abstract
This paper presents a 10-bit successive approximation register analogue-to-digital converter with energy-efficient switching scheme for biomedical applications. The energy-efficient switching scheme achieves an average digital-to-analog converter switching energy of 63.56 CVref <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , achieving an reduction of 95.34% compared with the conventional capacitor switching scheme for CDACs. With the switching scheme, the ADC can lower the dependency on the accuracy of Vcm and complexity of digital control logic and DAC driver circuit. Moreover, dynamic circuits are used to reduce power consumption of comparator and SAR digital logic. The prototype is designed and fabricated in a 180 nm CMOS with a core size of 500 μm x 300 μm (0.15 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). It consumes 7.6 nW at 1 kS/s sampling rate and 1.8-V supply with an achieved signal-to-noise-and distortion ratio of 45.90 dB and a resulting figure of merit of 51.7 fJ/conv.-step.
Year
DOI
Venue
2019
10.1109/APCCAS47518.2019.8953105
2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
Keywords
Field
DocType
Analog-to-digital converter (ADC),energy-efficient,successive approximation register (SAR)
Comparator,Computer science,Driver circuit,Sampling (signal processing),Electronic engineering,CMOS,Figure of merit,Successive approximation ADC,Electronic circuit,Digital control
Conference
ISBN
Citations 
PageRank 
978-1-7281-2941-9
0
0.34
References 
Authors
7
7
Name
Order
Citations
PageRank
Yunfeng Hu12814.38
Lisheng Chen200.68
Hui Chen3513.63
Yi Wen400.34
Huabin Zhang500.34
Zhaohui Wu63121246.32
Bin Li701.35