Name
Abstract | ||
|---|---|---|
In this paper, we propose a method to generate an application specific DMAC between a DFM and DRAM by utilizing HLS on an FPGA. Using this approach, DFM application developers can design DMAC corresponds to various memory access patterns according to each application with reducing a design burden. To address the feasibility of this approach, we discuss performance evaluation with empirical experiments. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/ReConFig48160.2019.8994725 | 2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig) |
Keywords | Field | DocType |
memory access patterns,high level synthesis approach,application specific DMA controllers,application specific DMAC,HLS,FPGA,DFM,DRAM | Dram,Application specific,Computer science,High-level synthesis,Parallel computing,Field-programmable gate array,Design for manufacturability,Embedded system | Conference |
ISSN | ISBN | Citations |
2325-6532 | 978-1-7281-1958-8 | 0 |
PageRank | References | Authors |
0.34 | 1 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomohiro Kida | 1 | 0 | 1.01 |
| Yuichi Kawamata | 2 | 0 | 1.01 |
| Yuichiro Shibata | 3 | 157 | 37.99 |
| Kentaro Sano | 4 | 0 | 0.34 |