Paper Info
Title
Almost-Zero Logic Implementation of Troika Hash Function on Reconfigurable Devices
Abstract
Blockchain technology has gained immense popularity in the recent years due to its decentralized computing architecture. While it originally emerged as a technology for (crypto)currencies, it has since found many different application areas including (but not limited to) payments, money transfers, smart contracts, supply-chain management, networking, IoT, etc. Initially, it was only Bitcoin, the de facto standard for cryptocurrencies, but then it was followed by several (in fact hundreds of) others. Each new cryptocurrency had or claimed to have certain advantages over Bitcoin, such as transaction speed and cost. However, they all relied on the original idea of distributed ledger where each block has maintained a complete history of each transaction in the network. Blockchain technology has more recently been challenged by two new technologies called Tangle and Hashgraph, which are “directed acyclic graphs”, i.e. in layman's terms blockchains without blocks and chains. IOTA network is the original Tangle technology, which relies on ternary arithmetic architecture and uses ternary hash function “Troika”. It works on GF(3) and its design follows the sponge construction. Two of the main claims of IOTA are scalability and micro-transitions, both of which are likely to utilize compact hardware platforms in practical implementations. In this paper, an almost-zero logic compact and yet adequately fast hardware architectures of Troika hash function targeting reconfigurable devices are presented. The proposed architectures mainly depend on the utilization of BRAMs on FPGAs. Three different RAM-based hardware implementations have been realized on Xilinx Artix-7xc7a12tcpg238-3 device; all using only a single BRAM tile with minimal number of LUTs and FFs. The proposed architectures can easily be implemented on different reconfigurable devices with similar efficiency. To the best of our knowledge, this is the first reported hardware implementation of Troika hash function on reconfigurable devices which is also compact and fast.
Year
DOI
Venue
2019
10.1109/ReConFig48160.2019.8994780
2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)
Keywords
Field
DocType
IOTA network,ternary arithmetic architecture,Xilinx Artix-7xc7a12tcpg238-3 device,troika hash function,blockchain technology,decentralized computing architecture,Bitcoin,almost-zero logic implementation,cryptocurrencies,de facto standard,Tangle and Hashgraph,directed acyclic graphs,ternary hash function,FPGA,RAM-based hardware implementations,BRAM tile,LUT
De facto standard,Decentralized computing,Computer science,Parallel computing,Field-programmable gate array,Implementation,Directed acyclic graph,Hash function,Cryptocurrency,Scalability,Embedded system
Conference
ISSN
ISBN
Citations 
2325-6532
978-1-7281-1958-8
0
PageRank 
References 
Authors
0.34
0
2
Name
Order
Citations
PageRank
Talga Yalçin100.34
Elif Bilge Kavun200.34