Title | ||
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A Power Analysis Attack Resistant Multicore Platform With Effective Randomization Techniques |
Abstract | ||
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Aimed at improving the resistance against power analysis attacks, a systematic and architectural design approach for multicore processors is proposed in this article and is demonstrated in an eight-core prototype platform with low performance overhead and hardware cost. In order to introduce randomness in both the time dimension and the amplitude dimension and make realignment extremely difficult,... |
Year | DOI | Venue |
---|---|---|
2020 | 10.1109/TVLSI.2020.2971636 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | DocType | Volume |
Multicore processing,Program processors,Power demand,Signal to noise ratio,Encryption | Journal | 28 |
Issue | ISSN | Citations |
6 | 1063-8210 | 0 |
PageRank | References | Authors |
0.34 | 0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jianwei Yang | 1 | 58 | 12.73 |
Jun Han | 2 | 14 | 7.15 |
Fan Dai | 3 | 0 | 0.34 |
Weizhen Wang | 4 | 0 | 2.37 |
Xiaoyang Zeng | 5 | 442 | 107.26 |