Abstract | ||
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In recent years, several approximate adders have been proposed which are targeted for energy-efficient system design specific to error-tolerant applications. An approximate least significant bit (LSB) adder (ALA) is one such class of adder which is composed of two adder segments: one accurate most significant adder segment and one LSB adder segment approximated with inexact adder components. Error metrics such as mean error distance (MED), mean square error distance (MSED), and worst case error (WCE) have been used widely in existing studies to characterize and compare various approximate adders. In this article, we propose three independent algorithms to compute exact values of MED, MSED, and WCE, respectively, for an ALA. The algorithms are based on an iterative computation of intermediate parameters from least significant sub-adder block to the most significant sub-adder block constituting the ALA. The simulation results show that for 16-bit ALAs, the proposed MED and MSED computation algorithms are, respectively, about
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and
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times faster than Monte Carlo (MC) simulation with 2
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup>
samples. Similarly, WCE computation method is
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times faster compared to the MC simulation with 2
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samples. |
Year | DOI | Venue |
---|---|---|
2020 | 10.1109/TVLSI.2020.2967149 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | DocType | Volume |
Approximate adders,approximate computing,error metric computation,mean error distance (MED),worst case error (WCE) | Journal | 28 |
Issue | ISSN | Citations |
4 | 1063-8210 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Avishek Sinha Roy | 1 | 0 | 1.35 |
Rajdeep Biswas | 2 | 0 | 0.34 |
Anindya Sundar Dhar | 3 | 97 | 26.09 |