Paper Info
Title
JIT-Based Context-Sensitive Timing Simulation for Efficient Platform Exploration
Abstract
Fast and accurate predictions of a program's execution time are essential during the design space exploration of embedded systems. In this paper, we present a novel approach for efficient context-sensitive timing simulations based on the LLVM IR code representation. Our approach allows evaluating simultaneously multiple hardware platform configurations with only one simulation run. State-of-the-art solutions are improved by speeding up the simulation throughput relying on the fast LLVM IR JIT execution engine. Results show on average over 94% prediction accuracy and a speedup of 200 times compared to interpretive simulations. The simulation performance reaches up to 300 MIPS when one HW configuration is assessed and it grows up to 1 GIPS evaluating four configurations in parallel. Additionally, we show that our approach can be utilized for producing early timing estimations that support the designers in mapping a system to heterogeneous hardware platforms.
Year
DOI
Venue
2020
10.1109/ASP-DAC47756.2020.9045255
2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)
Keywords
DocType
ISSN
JIT-based context-sensitive timing simulation,efficient platform exploration,program execution time,design space exploration,embedded systems,efficient context-sensitive timing simulations,LLVM IR code representation,simultaneously multiple hardware platform configurations,simulation run,fast LLVM IR JIT execution engine,prediction accuracy,interpretive simulations,simulation performance,HW configuration,early timing estimations,heterogeneous hardware platforms,computer execution rate 300.0 MIPS
Conference
2153-6961
ISBN
Citations 
PageRank 
978-1-7281-4124-4
0
0.34
References 
Authors
9
5
Name
Order
Citations
PageRank
Alessandro Cornaglia100.34
Md. Shakib Hasan200.34
Alexander Viehl318125.01
Oliver Bringmann458671.36
Wolfgang Rosenstiel51462212.32