Title | ||
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1.1 The Deep Learning Revolution and Its Implications for Computer Architecture and Chip Design |
Abstract | ||
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The past decade has seen a remarkable series of advances in machine learning, and in particular deeplearning approaches based on artificial neural networks, to improve our abilities to build more accurate systems across a broad range of areas, including computer vision, speech recognition, language translation, and natural language understanding tasks. This paper is a companion paper to a keynote talk at the 2020 International Solid-State Circuits Conference (ISSCC) discussing some of the advances in machine learning, and their implications on the kinds of computational devices we need to build, especially in the post-Moore's Lawera. It also discusses some of the ways that machine learning may be able to help with some aspects of the circuit design process. Finally, it provides a sketch of at least one interesting direction towards much larger-scale multi-task models that are sparsely activated and employ much more dynamic, exampleand task-based routing than the machine learning models of today. |
Year | DOI | Venue |
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2020 | 10.1109/ISSCC19947.2020.9063049 | 2020 IEEE International Solid- State Circuits Conference - (ISSCC) |
Keywords | DocType | ISSN |
machine learning,task-based routing,circuit design process,natural language understanding tasks,language translation,speech recognition,computer vision,artificial neural networks,chip design,computer architecture,deep learning revolution | Conference | 0193-6530 |
ISBN | Citations | PageRank |
978-1-7281-3206-8 | 2 | 0.49 |
References | Authors | |
22 | 1 |
Name | Order | Citations | PageRank |
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Jeffrey Dean | 1 | 11804 | 457.69 |