Paper Info
Title
Low 1/f 3 Noise Corner LC-VCO Design Using Flicker Noise Filtering Technique in 22nm FD-SOI
Abstract
This paper presents a K/Ka-band voltage biased differential LC-VCO in 22nm FD-SOI achieving a 1/f <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> corner below 18 kHz and a figure-of-merit (FOM) at 1 MHz offset frequency of 188~190 dBc/Hz over the tuning range. Thanks to the flicker noise filtering technique, flicker noise upconversion can be suppressed significantly without degrading the phase noise (PN) in the 1/f <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> region. The difference in connection of the switched-capacitor bank (SCB) over the VCO tuning range is taken into account in our analysis of flicker noise filtering. The VCO uses differential source degeneration with a self-coupled inductor that is used for layout compactness and common-mode (CM) resonance manipulation. To obtain a low 1/f <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> corner over the tuning range, a common centroid layout technique is used for the SCB. The post-layout simulation shows that the 1/f <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> corner is well below 50 kHz over the tuning range in different process corners. The PN@1 MHz and PN@100 kHz are −110.2 dBc/Hz and −89.9 dBc/Hz, respectively, at the center of the tuning range with a power consumption of 8.8 mW.
Year
DOI
Venue
2020
10.1109/TCSI.2020.2970267
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
DocType
Volume
Voltage-controlled oscillators,Tuning,Resonant frequency,Impedance,Capacitors,Transistors
Journal
67
Issue
ISSN
Citations 
5
1549-8328
1
PageRank 
References 
Authors
0.35
0
3
Name
Order
Citations
PageRank
Zhiwei Zong142.43
Giovanni Mangraviti2479.17
Piet Wambacq352996.10