Title
A Fully-integrated Gesture and Gait Processing SoC for Rehabilitation with ADC-less Mixed-signal Feature Extraction and Deep Neural Network for Classification and Online Training
Abstract
An ultra-low-power gesture and gait classification SoC is presented for rehabilitation application featuring (1) mixed-signal feature extraction and integrated low-noise amplifier eliminating expensive ADC and digital feature extraction, (2) an integrated distributed deep neural network (DNN) ASIC supporting a scalable multi-chip neural network for sensor fusion with distortion resiliency for low-cost front end modules, (3) onchip learning of DNN engine allowing in-situ training of user specific operations. A 12-channel 65nm CMOS test chip was fabricated with 1μW power per channel, less than 3ms computation latency, on-chip training for user-specific DNN model and multi-chip networking capability.
Year
DOI
Venue
2020
10.1109/CICC48029.2020.9075910
2020 IEEE Custom Integrated Circuits Conference (CICC)
Keywords
DocType
ISSN
edge processing,deep neural network,inter-chip communication,mixed-signal feature extraction,on-chip learning
Conference
0886-5930
ISBN
Citations 
PageRank 
978-1-7281-6032-0
0
0.34
References 
Authors
1
5
Name
Order
Citations
PageRank
Yijie Wei101.69
Qiankai Cao200.34
Jie Gu395.59
Kofi Otseidu401.35
Levi J Hargrove543842.47