Name
Abstract | ||
|---|---|---|
Neural networks have become indispensable for a wide range of applications, but they suffer from high computational- and memory-requirements, requiring optimizations from the algorithmic description of the network to the hardware implementation. Moreover, the high rate of innovation in machine learning makes it important that hardware implementations provide a high level of programmability to support current and future requirements of neural networks. In this work, we present a flexible hardware accelerator for neural networks, called Lupulus, supporting various methods for scheduling and mapping of operations onto the accelerator. Lupulus was implemented in a 28nm FD-SOI technology and demonstrates a peak performance of 380 GOPS/GHz with latencies of 21.4ms and 183.6ms for the convolutional layers of AlexNet and VGG-16, respectively. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/ICASSP40776.2020.9054764 | ICASSP |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Toftegaard Kristensen Andreas | 1 | 0 | 0.34 |
| Robert Giterman | 2 | 40 | 9.55 |
| Alexios Balatsoukas-Stimming | 3 | 187 | 25.98 |
| Andreas Burg | 4 | 0 | 1.69 |