Name
Title | ||
|---|---|---|
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs |
Abstract | ||
|---|---|---|
Probabilistic Graphical Models (PGM) have recently received increasing attention for various machine learning tasks and approaches for their acceleration on FPGAs have been presented.In this work, we investigate three different arithmetic formats, namely customized floating-point, Posit and logarithmic number systems with regard to their suitability for the inference in PGMs, specifically so-called Sum-Product Networks (SPN). Based on results from an automatic design-space exploration developed in this work, we implement hardware arithmetic operators for each format, optimized for SPN inference.Our evaluation shows that the choice of the most area-efficient solution depends on the relation between the numbers of adders to multipliers in the network. Up to 57% and 68% of Slice and DSP reductions, respectively, could be obtained compared to previous work. With regard to performance, all formats achieve similar results and outperform CPU and GPU-based implementations of SPN inference by factors up to 12x and 4. 6x, respectively. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/FCCM48280.2020.00020 | 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) |
Keywords | DocType | ISSN |
GPU-based implementations,customized floating-point,PGM,area-efficient solution,SPN inference,hardware arithmetic operators,automatic design-space exploration,logarithmic number systems,machine learning,probabilistic graphical models,FPGAs,sum-product networks,arithmetic number formats | Conference | 2576-2613 |
ISBN | Citations | PageRank |
978-1-7281-5804-4 | 0 | 0.34 |
References | Authors | |
7 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lukas Sommer | 1 | 8 | 7.53 |
| Lukas Weber | 2 | 3 | 4.89 |
| Martin Kumm | 3 | 5 | 1.29 |
| Andreas Koch | 4 | 155 | 29.56 |