Name
Abstract | ||
|---|---|---|
The bitstream inside a Field-Programmable Gate Array (FPGA) is often protected using an encryption key, acting as a root of trust and stored inside the FPGA, to defend against bitstream piracy, tampering, overproduction, and static-time reverse engineering. For cost savings and faster production, trusted system designers often rely on an untrusted system assembler to program the encryption key into the FPGA, focusing only the end-user-stage threats. However, providing the secret encryption key to an untrusted entity introduces additional threats, since access to this key can compromise the entire root of trust and breach the encrypted bitstream enabling a multitude of attacks including Trojan insertion, piracy and overproduction. To address this issue, we propose the Secure Remote FPGA Initialization (SeRFI) protocol to transmit the encryption key securely from a trusted system designer into an FPGA in physical possession of an untrusted system assembler. Our protocol eliminates direct key sharing with the untrusted system assembler as well as prevents against adversarial intention of extracting the encryption key during the programming phase where the assembler has physical access to the FPGA. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/VTS48691.2020.9107622 | 2020 IEEE 38th VLSI Test Symposium (VTS) |
Keywords | DocType | ISSN |
FPGA Security,Encryption,Secure Key Exchange | Conference | 1093-0167 |
ISBN | Citations | PageRank |
978-1-7281-5360-5 | 0 | 0.34 |
References | Authors | |
4 | 8 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Adam Duncan | 1 | 1 | 1.37 |
| Adib Nahiyan | 2 | 1 | 1.37 |
| Fahim Rahman | 3 | 1 | 1.03 |
| Grant Skipper | 4 | 0 | 0.34 |
| Martin Swany | 5 | 0 | 0.34 |
| Andrew Lukefahr | 6 | 153 | 7.08 |
| Farimah Farahmandi | 7 | 78 | 11.82 |
| Mohammad Tehranipoor | 8 | 3181 | 243.40 |