Paper Info
Title
WCET-aware Code Generation and Communication Optimization for Parallelizing Compilers
Abstract
High performance demands of present and future embedded applications increase the need for multi-core processors in hard real-time systems. Challenges in static multi-core WCET-analysis and the more complex design of parallel software, however, oppose the adoption of multi-core processors in that area. Automated parallelization is a promising approach to solve these issues, but specialized solutions are required to preserve static analyzability. With a WCET-aware parallelizing transformation, this work presents a novel solution for an important building block of a real-time capable parallelizing compiler. The approach includes a technique to optimize communication and synchronization in the parallelized program and supports complex memory hierarchies consisting of both shared and core-private memory segments. In an experiment with four different applications, the parallelization improved the WCET by up to factor 3.2 on 4 cores. The studied optimization technique and the support for shared memories significantly contribute to these results.
Year
DOI
Venue
2020
10.23919/DATE48585.2020.9116400
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Keywords
DocType
ISSN
real-time,multi-core,compiler tools,WCET
Conference
1530-1591
ISBN
Citations 
PageRank 
978-1-7281-4468-9
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Simon Reder1163.11
Jürgen Becker21894259.42