Paper Info
Title
A RRAM-based FPGA for Energy-efficient Edge Computing
Abstract
The shift from centralized cloud to edge computing demands hardware systems with data processing capability at ultra-low power. Reconfigurable solutions such as Field-Programmable Gate Arrays (FPGAs) offer a high flexibility in terms of hardware implementation and are thus popular for use in many edge computing systems. However, breaking through the energy wall of FPGAs is a challenge, as low-power operation often requires compromising performances. In this paper, we study a low-power high-performance FPGA architecture exploiting Resistive Random Access Memory (RRAM) technology. To perform a comprehensive analysis, we introduce a novel design flow which can rapidly prototype FPGA fabrics from which accurate area, delay, and power results can be obtained. Based on full-chip layouts and SPICE simulations, we show that RRAM-based FPGAs can improve up to 8%/22%/16% in area/delay/power compared to SRAM-based counterparts at nominal voltage. Even when operated at a near-V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> supply, the proposed RRAM-based FPGA can improve the Energy-Delay Product by about 2× without any delay overhead, when compared to an SRAM-based FPGA. In addition, Monte Carlo simulations showed that the proposed RRAM-based FPGA architecture stays robust under different CMOS process corners as well as under a 30% RRAM resistance standard deviation.
Year
DOI
Venue
2020
10.23919/DATE48585.2020.9116478
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Keywords
DocType
ISSN
Field-programmable gate arrays,Resistive memories,Low-power design
Conference
1530-1591
ISBN
Citations 
PageRank 
978-1-7281-4468-9
0
0.34
References 
Authors
0
5
Name
Order
Citations
PageRank
Xifan Tang15912.89
Edouard Giacomin264.23
Patsy Cadareanu322.55
Ganesh Gore411.73
Pierre-Emmanuel Gaillardon535555.32