Paper Info
Title
An 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity for On-Device Speech Recognition
Abstract
Long short-term memory (LSTM) is a type of recurrent neural networks (RNNs), which is widely used for time-series data and speech applications, due to its high accuracy on such tasks. However, LSTMs pose difficulties for efficient hardware implementation because they require a large amount of weight storage and exhibit computation complexity. Prior works have proposed compression techniques to alleviate the storage/computation requirements of LSTMs but elementwise sparsity schemes incur sizable index memory overhead and structured compression techniques report limited compression ratios. In this article, we present an energy-efficient LSTM RNN accelerator, featuring an algorithm-hardware co-optimized memory compression technique called hierarchical coarse-grain sparsity (HCGS). Aided by the HCGS-based blockwise recursive weight compression, we demonstrate LSTM networks with up to 16 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> fewer weights while achieving minimal error rate degradation. The prototype chip fabricated in 65-nm LP CMOS achieves up to 8.93 TOPS/W for real-time speech recognition using compressed LSTMs based on HCGS. HCGS-based LSTMs have demonstrated energy-efficient speech recognition with low error rates for TIMIT, TED-LIUM, and LibriSpeech data sets.
Year
DOI
Venue
2020
10.1109/JSSC.2020.2992900
IEEE Journal of Solid-State Circuits
Keywords
DocType
Volume
Speech recognition,Logic gates,Feature extraction,Microsoft Windows,Task analysis,Hardware,Error analysis
Journal
55
Issue
ISSN
Citations 
7
0018-9200
2
PageRank 
References 
Authors
0.49
0
5
Name
Order
Citations
PageRank
Deepak Kadetotad121.17
Shihui Yin27110.03
Visar Berisha37622.38
Chaitali Chakrabarti420.49
Jae-sun Seo553656.32