Title
Linking Chip, Board, and System Test via Standards
Abstract
This paper introduces a standards-based framework which enables two types of test re-use: direct re-use of test patterns written for low-level components of a system, and access by high-level tests of test features embedded within the low-level components. The underlying mechanism for both is the encapsulation, retargeting, and transformation of test procedures through successive layers of hardware interfaces, as codified in two standards being developed by IEEE Working Groups (P1687.1 and P2654). Examples demonstrate the steps in the process and illustrate both the challenges and opportunities of this approach.
Year
DOI
Venue
2020
10.1109/ETS48528.2020.9131595
2020 IEEE European Test Symposium (ETS)
Keywords
DocType
ISSN
system test,embedded test,retargeting,IEEE 1687,IEEE P1687.1,IEEE P2654,IJTAG,SJTAG,STAM
Conference
1530-1877
ISBN
Citations 
PageRank 
978-1-7281-4312-5
0
0.34
References 
Authors
0
3
Name
Order
Citations
PageRank
Michele Portolan1115.50
Jeff Rearick230425.63
Martin Keim300.34