Title | ||
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An Accurate and Quick ANN-Based System-Level Dynamic Power Estimation Model Using LLVM IR Profiling for FPGA Designs |
Abstract | ||
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The demand of early estimation of the power of semiconductor devices has risen due to technology scaling, growing complexity, and faster time to market. In this letter, we present the early power estimation model for field programmable gate array-based designs. We perform the profiling at C-level using low-level virtual machine intermediate representation and then training of the neural network fr... |
Year | DOI | Venue |
---|---|---|
2020 | 10.1109/LES.2019.2935052 | IEEE Embedded Systems Letters |
Keywords | DocType | Volume |
Neurons,Estimation,Field programmable gate arrays,Training,Benchmark testing,Neural networks,Space exploration | Journal | 12 |
Issue | ISSN | Citations |
2 | 1943-0663 | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Abhishek N. Tripathi | 1 | 0 | 0.34 |
Arvind Rajawat | 2 | 12 | 3.84 |